Design and analysis of class DE amplifier with any output Q, any duty ratio and switch on resistance
Hiroo Sekiya, Satoki Oshikawa, Jianming Lu, and Takashi Yahagi
2003 IEEE International Symposium on Circuits and Systems (ISCAS2003), pp.III-280-283, May, 2003. [pdf document]

<Abstract>

This paper presents a new design procedure for class DE amplifier. And the design values and output capabilities of class DE amplifier with any output Q, any duty ratio, and switch on resistance are shown. The main idea of this paper is what the order of the `analysis and design' is changed to `design and analysis'. If the design values are known, the characteristics of the amplifier can be derived easily by numerical calculations. Carrying out the circuit experiments, we show the validity of the design procedure. Measured efficiency is 93.0% with 1.0-MHz and 1.6-W output.